SN74LVC1G86DBVR

The SN74LVC1G86DBVR is a Single 2-input Exclusive-OR Gate, designed for 1.65 to 5.5V VCC operation. The SN74LVC1G86DBVR device performs the Boolean function Y = A x B or Y = AB + AB in positive logic. A common application is as a true/complement element. If the input is low, the other input is reproduced in true form at the output. If the input is high, the signal on the other input is reproduced inverted at the output. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. ESD protection exceeds JESD 22, 2000V human-body model (A114-A), 200V machine model (A115-A) and 1000V charged-device model (C101).

• Supports 5V VCC operation
• Inputs accept voltages to 5.5V
• Supports down translation to VCC
• Maximum TPD of 4ns at 3.3V
• Low power consumption, 10µA maximum ICC
• ±24mA Output drive at 3.3V
• Ioff supports live insertion, partial power-down mode operation and back-drive protection
• Latch-up performance exceeds 100mA per JESD 78, class II
• Green product and no Sb/Br

Applications

Industrial

Warnings

Device has limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.