Product Information
Product Overview
The 74LVC373AD is an octal transparent D Latch with 5V tolerant inputs/outputs. It features separate D-type inputs for each latch and 3-state true outputs for bus-oriented applications. A latch enables input (pin LE) and an output enable input (pin OE\) is common to all internal latches. When pin LE is high, data at the D-inputs (pins D0 to D7) enters the latches. In this condition, the latch is transparent, that is, a latch output will change each time its corresponding D-input changes. When pin LE is low, the latch stores the information that was present at the D-inputs one set-up time preceding the high-to-low transition of pin LE. When pin OE\ is low, the contents of the eight latches are available at the Q-outputs (pins Q0 to Q7). When pin OE\ is high, the outputs go to the high-impedance OFF-state. Operation of input pin OE does not affect the state of the latches. Inputs can be driven from either 3.3 or 5V devices.
- CMOS low power consumption
- Direct interface with TTL levels
Applications
Computers & Computer Peripherals, Communications & Networking
Technical Specifications
74LVC373
Tri State Non Inverted
50mA
SOIC
1.65V
8bit
74373
125°C
-
No SVHC (15-Jan-2018)
D Type Transparent
-
SOIC
20Pins
3.6V
74LVC
-40°C
-
MSL 1 - Unlimited
Technical Docs (2)
Legislation and Environmental
Country in which last significant manufacturing process was carried outCountry of Origin:China
Country in which last significant manufacturing process was carried out
RoHS
RoHS
Product Compliance Certificate