74AUP1G97GW,125

74AUP1G97GW,125 is a configurable multiple-function gate with Schmitt-trigger inputs. This device can be configured as any of the following logic functions MUX, AND, OR, NAND, NOR, inverter and buffer; using the 3bit input. All inputs can be connected directly to VCC or GND. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8V to 3.6V. This device is fully specified for partial-power-down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

• Wide supply voltage range from 0.8V to 3.6V, CMOS low power dissipation
• High noise immunity, low static power consumption; ICC = 0.9μA maximum
• Latch-up performance exceeds 100mA per JESD 78 Class II Level B
• Overvoltage tolerant inputs to 3.6V, low noise overshoot and undershoot <lt/> 10% of VCC
• IOFF circuitry provides partial power-down mode operation
• Supply current is 0.5μA maximum at (VI = GND or VCC; IO = 0A; VCC = 0.8V to 3.6V)
• Input leakage current is ±0.1µA maximum at (VI = GND to 3.6V; VCC = 0V to 3.6V)
• Propagation delay is 6.6ns typical at (VCC = 1.1V to 1.3V, CL = 5pF)
• Operating temperature range from -40°C to +125°C
• TSSOP6 package