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MC100EPT21DTG - 

Differential LVPECL-to-LVTTL Translator, 2 Input, 24 mA, 1.4 ns, 3 V to 3.6 V, TSSOP-8

MC100EPT21DTG - Differential LVPECL-to-LVTTL Translator, 2 Input, 24 mA, 1.4 ns, 3 V to 3.6 V, TSSOP-8

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Manufacturer Part No:
MC100EPT21DTG
Order Code:
1192077
Technical Datasheet:
MC100EPT21DTG   Datasheet
See all Technical Docs

Product Overview

The MC100EPT21DTG is a 3.3V Differential LVPECL/LVDS/CML to LVTTL/LVCMOS Translator ideal for applications which requires the translation of a clock or data signal. Because LVPECL (positive ECL), LVDS and positive CML input levels and LVTTL/LVCMOS output levels are used, only 3.3V and ground are required. The VBB output allows this EPT21 to be cap coupled in either single-ended or differential input mode. When single-ended cap coupled, VBB output is tied to the D input and D is driven for a non-inverting buffer or VBB output is tied to the D input and D is driven for an inverting buffer. When cap coupled differentially, VBB output is connected through a resistor to each input pin. If used, the VBB pin should be bypassed to VCC via a 0.01F capacitor. For a single-ended direct connection use an external voltage reference source such as a resistor divider. Do not use VBB for a single-ended direct connection or port to another device.
  • LVPECL/LVDS/CML Inputs
  • LVTTL/LVCMOS Outputs
  • 24mA TTL outputs
  • Contains temperature compensation
  • >275MHz Typical maximum frequency

Applications

Clock & Timing

Product Information

:
2
:
24mA
:
1.4ns
:
8Pins
:
TSSOP
:
3V
:
3.6V
:
-40°C
:
85°C
:
Level Translator
:
-
:
-
:
MSL 3 - 168 hours
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