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MT46V32M16P-5B:J.

DRAM, DDR, 512 Mbit, 32M x 16bit, 200 MHz, TSOP, 66 Pins

MT46V32M16P-5B:J. - DRAM, DDR, 512 Mbit, 32M x 16bit, 200 MHz, TSOP, 66 Pins

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Manufacturer:
MICRON MICRON
Manufacturer Part No:
MT46V32M16P-5B:J.
Order Code:
2253731
Product Range
MT46V Series
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Product Overview

The MT46V32M16P-5B:J is a Double Data Rate (DDR) SDRAM uses double data rate architecture to achieve high-speed operation. The double data rate architecture is essentially 2n-prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pins. A single read or write access for the DDR SDRAM effectively consists of a single 2n-bit-wide, one-clock-cycle data transfer at the internal DRAM core and two corresponding n-bit-wide, one-half-clock-cycle data transfers at the I/O pins. A bidirectional data strobe (DQS) is transmitted externally, along with data, for use in data capture at the receiver. DQS is a strobe transmitted by the DDR SDRAM during reads and by the memory controller during writes. DQS is edge-aligned with data for reads and centre-aligned with data for writes. The x16 offering has two data strobes, one for the lower -byte and one for the upper -byte.
  • Differential clock inputs
  • Commands entered on each positive CK edge
  • DLL to align DQ and DQS transitions with CK
  • Four internal banks for concurrent operation
  • Auto refresh - 64ms, 8192-cycle
  • Longer-lead TSOP for improved reliability (OCPL)
  • Concurrent auto precharge option supported

Applications

Communications & Networking

Product Information

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:
DDR

:
512Mbit

:
32M x 16bit

:
200MHz

:
TSOP

:
66Pins

:
2.5V

:
5ns

:
0°C

:
70°C

:
MT46V Series

:
MSL 3 - 168 hours
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Technical Docs (1)

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