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WG82574IT S LBAC

Ethernet Controller, 1000 Mbps, IEEE 802.3, IEEE 802.3u, IEEE 802.3ab, 3 V, 3.6 V, QFN, 64 Pins

WG82574IT      S LBAC - Ethernet Controller, 1000 Mbps, IEEE 802.3, IEEE 802.3u, IEEE 802.3ab, 3 V, 3.6 V, QFN, 64 Pins

Image is for illustrative purposes only. Please refer to product description.

Manufacturer:
INTEL INTEL
Manufacturer Part No:
WG82574IT S LBAC
Order Code:
1740827
Technical Datasheet:
WG82574IT S LBAC   Datasheet
See all Technical Docs

Product Overview

The WG82574IT S LBAC is a single compact low power GbE Controller that offer a fully-integrated Gigabit Ethernet Media Access Control (MAC) and Physical Layer (PHY) port. The 82574L uses the PCI Express* (PCIe*) architecture and provides a single-port implementation in a relatively small area so it can be used for server and client configurations as a LAN on Motherboard (LOM) design. The 82574 family can also be used in embedded applications such as switch add-on cards and network appliances. External interfaces provided on the 82574 are PCIe Rev. 1.1 (2.5GHz) x1, MDI (Copper) standard IEEE 802.3 Ethernet interface for 1000BASE-T, 100BASETX and 10BASE-T applications (802.3, 802.3u and 802.3ab), NC-SI or SMBus connection to a Manageability Controller (MC) and IEEE 1149.1 JTAG (note that BSDL testing is NOT supported). Supports MAC address filters such as perfect match unicast filters, multicast hash filtering, broadcast filter and promiscuous mode.
  • Compliant with the 1Gbps Ethernet 802.3
  • 802.3u 802.3ab Specifications
  • 10/100/1000Mbps Multi-speed operation
  • Full-duplex operation at 10/100/1000Mbps
  • Half-duplex operation at 10/100Mbps
  • Flow control support compliant with the 802.3X specification
  • VLAN support compliant with the 802.3q specification
  • Configurable LED operation for OEM customization of LED displays
  • Statistics for management and RMON
  • MAC loopback
  • Host interface - PCIe interface to chipset
  • NC-SI over RMII for remote management core
  • SMBus advanced pass through
  • Configurable receive and transmit data FIFO, programmable in 1kB increments
  • TCP segmentation capability compatible with NT 5.x TCP Segmentation Offload (TSO) features
  • Supports up to 64kB TSO (TSO v2)
  • Fragmented UDP checksum offload for packet reassembly
  • IPv4 and IPv6 checksum offload support (receive, transmit and TSO)
  • Split header support
  • Receive side scaling (RSS) with two hardware receive queues

Applications

Communications & Networking

Warnings

ESD sensitive device, take proper precaution while handling the device.

Product Information

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:
1000Mbps

:
IEEE 802.3, IEEE 802.3u, IEEE 802.3ab

:
3V

:
3.6V

:
QFN

:
64Pins

:
I2C, JTAG, PCI, SPI

:
-40°C

:
85°C

:
-

:
-

:
MSL 3 - 168 hours
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Technical Docs (2)

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