Evaluation Board, Ultra Low Jitter Pin Selectable Oscillator, LMK61PD0A2

LMK61PDEVM - Evaluation Board, Ultra Low Jitter Pin Selectable Oscillator, LMK61PD0A2

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Product Overview

The LMK61PDEVM is an ultra low jitter pin selectable oscillator evaluation module. This evaluation module provides a complete platform to evaluate the 100fs RMS jitter performance and configurability of the TI's LMK61PD ultra low jitter pin selectable differential oscillator with 7 unique reference clock frequencies and configurable output format. It is used as high performance clock source for jitter critical applications and can easily be configured to any user selected predefined frequency and output format. The onboard configurable jumpers allows for device configuration allowing the user to select from one of seven unique output frequencies & output format. The edge-launch SMA ports provide access to the LMK61PD's differential clock output for interfacing to test equipment or reference boards using commercially available coaxial cables, adapters or baluns. This connectivity enables integrated system level testing between LMK61PD0A2 & third-party FPGA/ASIC/SoC reference boa
  • Ultra low jitter differential clock generation
  • Pin selectable output frequency of62.5MHz, 100MHz, 106.25MHz, 125MHz, 156.25MHz, 212.5MHz, 312.5MHz
  • Pin selectable output format of LVPECL, LVDS or HCSL
  • Powered over USB or externally (SMA connector)
  • LED indicators indicates device power
  • Configurable output format termination to support LVPECL, LVDS, or HCSL


Clock & Timing


Evaluation module LMK61PDEVM, 3feet USB cable (Q362-ND).


Market demand for this product has caused an extension in lead times, delivery dates may fluctuate

Product Information

Texas Instruments
Clock & Timing
Eval Board LMK61PD0A2, USB Cable
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