2014/09/01
 
 
 
Home > Manufacturers > Analog Devices > AD9656 - Quad, 16-Bit, 125 Ms/s ADC
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Analog Devices

Analog Devices AD9656 - Quad, 16-Bit, 125 Ms/s ADC

The AD9656 is a quad, 16-bit, 125 Ms/s analogue-to-digital converter (ADC) with an on-chip sample-and-hold circuit.

  • Small footprint. Four ADCs in an 8x8mm package
  • Configurable JESD204B output block supports up to 6.4 Gbps per lane
  • Low power of 198 mW per channel at 125 MSPS into two lanes
Analog Devices AD9656 - Quad, 16-Bit, 125 Ms/s ADC

Product Description

The AD9656 is a quad, 16-bit analogue-to-digital converter (ADC) with an on-chip sample-and-hold circuit designed for low cost, low power, small size, and ease of use.
It operates at a conversion rate of up to 125 Ms/s and is optimised for outstanding dynamic performance and low power in applications where a small package size is critical.

The ADC requires a single 1.8V power supply and LVPECL-/ CMOS-/LVDS-compatible sample rate clock for full performance operation. No external reference or driver components are required for many applications.

Individual-channel power-down is supported and typically consumes less than 2 mW when all channels are disabled. The ADC contains several features designed to maximise flexibility and minimise system cost, such as programmable output clock and data alignment and digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).
The AD9656 is available in a RoHS-compliant, 56-lead LFCSP. It is specified over the industrial temperature range of -40°C to +85°C.

Typical applications

Medical imaging, High speed imaging, Quadrature radio receivers, Diversity radio receivers, Portable test equipment.

Phase-locked loop

Allows users to providea single ADC sampling clock; the PLL multiplies the ADC sampling clock to produce the corresponding JESD204Bdata rate clock.

Special features

Programmable output clock and data alignment and digital test pattern generation, built-in deterministic and pseudorandom patterns, and custom user-defined test patterns entered via the Serial Peripheral Interface (SPI).

 
 
   

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